Change Impact Analysis Requirements changes are a part of the development cycle. If they are not properly controlled, they can make the project more complicated, delay delivery schedules and put pressure to the development team affecting their morale. In FPGA development, a requirement change can impact any of the following areas: Lower level requirements Lines of code in the HDL design files (top level or sub blocks) Requirements-based test cases Lines of code in the testbench files and components of the verification environment Simulation runs, Code Coverage analysis and reports, waveforms and log files Synthesis, Timing or Placement constraints Review activities Team member(s) responsible for the affected element Delivery schedules Spec-TRACER is equipped with several features and built-in reporting for Impact Analysis. An example of Impact Analysis report is shown below. As illustrated here, if there is a change request for requirement ‘FPGA-007 Chip Enable’ then there are 27 elements that will be impacted such as conceptual design, HDL design files, test cases, testbench and simulation runs. Spec-TRACER Impact Analysis is key in determining the magnitude of the impact before change requests are approved and implemented. It helps teams make well-informed decisions that align with business objectives and project goals. With the growing complexity and size of today’s FPGA/ASIC in which an average design consists of hundreds of requirements and thousands of related elements, running Impact Analysis as part of the change control process has never been more crucial to a project’s success.
