Aldec and NEC Corp. Ink Distributorship Agreement for CyberWorkBench® ASIC/FPGA High Level Synthesis Solution

Henderson, NV – July 31, 2013 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, today unveils a new partnership with NEC Corporation, Japan. Under the terms of the agreement, Aldec has acquired distributorship rights for CyberWorkBench®, a well-established High Level Synthesis solution.  

 

“Aldec has been a trusted name in the EDA industry for 30 years. Combining high level synthesis technology from NEC with Aldec’s verification ecosystem provides designers a full solution for SoC design and validation.” said Kazutoshi Wakabayashi, Senior Expert, Embedded System Solutions Business Center and Green Platform Research Laboratories, NEC.

 

While traditional hardware design involves RTL development and debugging, the increase in the complexity of today’s designs render the traditional approach too time consuming and error prone. Where the entire focus of designing hardware is shifted from traditional RTL method to a higher abstraction level, development time and cost savings can be significant.

 

“CyberWorkBench generates high quality RTL implementation from a high level algorithmic description, and thus avoids manual RTL processing that requires long iterations in design cycles,” said Satyam Jani, Aldec Product Manager, “Automating the RTL generation process allows faster turnaround time for complex designs and increases the productivity by 2x-3x.”

 

About CyberWorkBench®

CyberWorkBench is an “All-in-C” synthesis and verification tool developed by NEC over a period of twenty years. The C-based flow in the solution supports both controller and data path modules and allows designers to achieve higher design efficiency, low area and high performance for ASIC and FPGA chips. Along with a behavioral synthesizer, simulator and formal verifier it also includes:

• Support for both control dominated circuits and datapath modules
• Dedicated technology support for Altera® & Xilinx® FPGAs
• Best-in-class High-Level Synthesizer that features automatic pipelining, power optimization, powerful parallelism extraction
• Powerful graphical analysis capabilities for synthesized circuits
• C-based Formal Verification using assertions and properties
• Automatic top level structural description generator to connect C-based modules and legacy RTL modules
• Powerful SystemC source code debugger
• Legacy/IP RTL code to SystemC converter for easier migration to C-based design flow

 

Availability

CyberWorkBench is available today for use with commercially-available Windows/Linux-based operating systems.
For more information, incl. white paper and resources, visit  www.aldec.com/en/support/resources.

 

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com