7-Series FPGA Chips Programming on the HES7XV690-4000BP Board

Introduction

There are two ways to program the Kintex-7 and Virtex-7 FPGAs on the HES7XV690-4000BP board:

• Using a standard Xilinx Platform Cable connected to the J1 JTAG connector on the HES7 board.

• Using a USB Interface connected to your PC.

Figure 1 J1 and USB1 connector locations

Programming the 7-Series FPGA chips using a standard Xilinx Platform cable

1. Connect the Xilinx USB Platform cable to the J1 JTAG connected on the HES7 board (see figure 1).

2. Make sure that the Xilinx USB Platform cable is connected to your PC.

   

   Figure 2 Xilinx USB Platform cable connected to the J1 JTAG connector on the HES7 board

3. Turn on the power supply for the HES7XV690-4000BP.

4. Initialize the 7-Series FPGA chip JTAG chain using the Xilinx Impact programming tool.

   

   Figure 3 7-Series FPGAs JTAG chain successful initialization

5. Both Kintex-7 and Virtex-7 chips are now available for programming.

6. Select which FPGA chip you want to configure and set the proper configuration bit file.

7. Run the FPGA chip configuration (using default settings).

8. The FPGA chip that was selected is now programmed and ready to use.

Programming 7-Series FPGA chips using a standard USB Interface connected to your PC

1. Connect one side of the USB cable to the USB1 connector on the HES7 board, and the other side of the USB cable to the USB port in your PC.

   

   Figure 4 7-Series FPGA JTAG chain successful initialization

2. Turn on the power supply for the HES7xv690-4000BP.

3. Wait for the USB connection initialization.

4. Run the hes7proto.exe application from the command line using the proper attributes:

   --list	list all boards and corresponding devices on each board
   --board arg	select board to work with, if there is only one board default value is 0.
   --kintex7_0 arg	path to a bitstream file to configure a Kintex-7, FPGA0 chip.
   --virtex7_1 arg	path to a bitstream file to configure a Virtex-7, FPGA1 chip.
   --virtex7_2 arg	path to a bitstream file to configure a Virtex-7, FPGA2 chip.
   --pllconfig arg	path to a PLL configuration file
   --reset	global reset for all FPGAs (for FPGA0-2 designs)
   --status	check the master status of the HES-7 diagnostic test.

   

   Figure 5 Exemplary result of running the hes7proto.exe --help command from the command line

5. The FPGA chip selected in the previous step is now configured with the bit file specified as an argument for the hes7proto.exe application.

For Example

The hes7proto.exe application was installed in the C:\Aldec\HES7.Asic.Proto.2012.09 directory, and we have our bit file test1.bit for FPGA1 within the D:\user_design\ directory. We are able to configure FPGA1 using the following syntax:

hes7proto.exe --virtex7_1 D:\user_design\test1.bit