Aldec HES-7 SoC Prototyping Solution Adopted by Kumamoto University in Japan

Date: Sep 23, 2013
Type: Release

Tokyo, Japan – September 23, 2013Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, today announced that the Kumamoto University Graduate School of Science and Technology has adopted Aldec’s HES-7 SoC and ASIC Prototyping solution to be utilized in continuous research in the fields of Computer Architecture and VLSI System Design.

HES-7 provides students access to Xilinx’s newest generation of FPGAs with the Virtex®-7 family, and ability to utilize the ARM® Cortex™-A9 processor through the Xilinx® Zynq™ SoC. Bundled with an array of peripherals and connectors such as HDMI, Wi-Fi, Bluetooth, and USB 2.0, students are presented with the flexibility in designing an array of applications across many industries.

“Our research area requires a million ASIC gates. In our search for a large-capacity FPGA prototyping board, we discovered Aldec’s HES-7™ was the perfect solution with two of the largest FPGAs available,” said Professor Toshinori Sueyoshi, Graduate School of Science and Technology, Computer Science and Electrical Engineering, Kumamoto University at Japan, “We are grateful for Aldec’s support. Reducing design implementation efforts allows our students to better focus on research and development tasks without capacity limits”.

“Aldec provides continuous support in the educational field, and believes in educating both working and future engineers with the latest verification methodologies and tools”, said Bill Tomas, Aldec Product Manager, Hardware Division, “We are pleased to support the Kumamoto University Graduate Program’s goals in offering intense hands-on experience with the latest in technology”.


About Kumamoto University Graduate School Program

Kumamoto University is an international university with a worldwide reputation for excellence in teaching and research. The Computer Architecture and VLSI System Design Laboratory at Kumamoto University allows graduate students to further their research in the fields of Next Generation Computing Systems, Digital Design Reliability, 3-Dimensional Reconfigurable Logic Architectures, and Developing the Next Generation of FPGA Architectures. Their research environment provides students with access to latest technology including high performance workstations, FPGA prototyping boards, logic analyzer, oscilloscope, function generator, and more.  


About HES™

HES is a complete ASIC/SoC hardware-based verification solution from Aldec that provides a unified platform for bit level simulation acceleration, transaction level emulation, system architecture exploration, HW/SW co-verification, virtual modeling and prototyping.


About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.


Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.

Media Contact: Aldec, Inc.                               
Christina Toole, Corporate Marketing Manager
+ (702) 990-4400
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