Aldec Releases Automated Static Linting and CDC Analysis for Microchip FPGA and SoC FPGA Designs February 06 Verifying at a Higher Level of Abstraction June 22 Riviera-PRO Supports OpenCPI for Heterogeneous Embedded Computing of Mission-Critical Applications June 01 Advancing VHDL’s Verification Capabilities with VHDL-2019 Protected Types March 29 Aldec Suspends all EDA Sales and Distribution Transactions in Russia March 14 View all news
The Need for CDC Verification in FPGA Designs Feb 22 (Training, Tokyo, Japan (Online)) Linting and Clock Domain Crossing Analysis for Microchip FPGA Designs Mar 02 (Webinar, Online) Let's go with UVM. No - let’s go with UVVM for VHDL verification Mar 03 (Training, Tokyo, Japan (Online)) Embedded World Exhibition & Conference 2023 Mar 14 - 16 (Industry Event, Nürnberg, Germany) Design Automation Conference (DAC) 2023 Jul 09 - 13 (Industry Event, San Francisco, CA) View all events
Engineering best practices for Python-based testbenches with cocotb Optimizing Simulations for Efficient Coverage Collection Assertions-Based Verification for VHDL Designs CDC Verification with Hard IP Blocks Introduction to OpenCPI - Open-Source Framework for Heterogenous Computing View all webinars
