Aldec Design and Verification Blog

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SynthHESer - Aldec’s New Synthesis Tool

In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all did many logic optimization exercises back in college....

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Linting RISC-V designs with ALINT-PRO

As the open-source RISC-V instruction set architecture (ISA) continues to gain momentum, the growing number of RISC-V design solutions, and their flexibility, creates a problem when choosing the most reliable and robust solution from a number of contenders....

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Enabling TySOM Zynq-based Embedded Development Board for AWS IoT Greengrass
Qualified Zynq SoC Dev Board for IoT Greengrass

Everyday there are new devices appearing in homes, offices, hospitals, factories and thousands of other places that are part of the Internet-of-Things (IoT). Clearly, they need to be connected to the internet and there is a need for a huge amount of raw data to be collected...

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Connecting Emulated Design to External PCI Express Device

These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it.   Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation...

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How to Develop a 4K Ultra High Definition Image/Video Processing Application Using Zynq® MPSoC FPGA
Let’s do the 4K video conferencing

Achieving higher resolution is a never-ending race for camera, TV and display manufacturers. After the emergence of 4K ultra high definition (Ultra HD) imaging in the market, it became the main standard for today’s multimedia products....

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Is your Verification plan pulling you in multiple directions? Try FSM Coverage
A quick look into FSM Coverage

The verification process is long and time consuming, especially when you are not sure what you are looking for. There are a lots of directions you can go looking for bugs but without a guide, without a plan you will most likely be going in circles....

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ARM-based SoC Co-Emulation using Zynq Boards
Ready-to-use Co-Emulation Platform

Have you ever worked on a group project where you had to combine your work with that of a colleague of a different engineering discipline but the absence of an efficient means of doing so affected the project’s overall outcome?...

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Evaluating NVMe SSD Multi-Gigabit Performance using Aldec TySOM-3/3A Boards

The multi-channel parallelism and low-latency access of NAND flash technology have made Non-Volatile Memory express (NVMe) based SSDs very popular within the main segments of the data storage market, including not only the consumer electronics sector but also data center processing and acceleration services, where the key role is played by specialized FPGA-based hardware for application-specific workloads....

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When is robustness verification for DO-254 projects complete?

Understandably, hardware designed for an aircraft, or indeed any safety critical application, must be robust. I also believe that all engineers wish to verify their designs as thoroughly as possible, anyway. However, there are limiting factors; most notably the high complexity of most designs. Since we are unable to discover and verify the design against all abnormal conditions, the main question is: when is robustness verification truly complete?...

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How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices
Faster inference in DNN-based applications using FPGAs

Machine learning is the process of using algorithms to parse data, learn from it, and then make a decision or prediction. Instead of preparing program codes to accomplish a task, the machine is ‘trained’ using large volumes of data and algorithms to perform...

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