Company Newsroom Industry’s First use of TLM for the At-Speed Verification of a PCIe-Based Avionics Design Requiring DO-254 Compliance Release Feb 14, 2022 Productivity Through Methodology: Aldec Adds UVM Generator to Riviera-PRO™ Plus Updates Its OSVVM and UVVM Libraries Release Nov 16, 2021 New HES Board is Ideal for Prototyping and Emulating Medium to Large ASIC & SoC Designs Release Aug 16, 2021 New TySOM-M Series Targets Low Power, High Security Applications Release Jul 7, 2021 Aldec Launches HES-DVM Proto ‘Cloud Edition’ - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping Release Jun 2, 2021 Airborne System Design Assurance: Aldec Adds 60+ New HDL Rules to ALINT-PRO’s DO-254 Plug-In Release Mar 4, 2021 Powerful FPGA Design Creation and Simulation IDE Adds VHDL-2019 Support & OSVVM Enhancements Release Jan 20, 2021 RECENT NEWS Aldec Releases Automated Static Linting and CDC Analysis for Microchip FPGA and SoC FPGA DesignsRelease FEB 06, 2023Verifying at a Higher Level of AbstractionIn the News JUN 22, 2022Riviera-PRO Supports OpenCPI for Heterogeneous Embedded Computing of Mission-Critical ApplicationsRelease JUN 01, 2022Advancing VHDL’s Verification Capabilities with VHDL-2019 Protected TypesRelease MAR 29, 2022Aldec Suspends all EDA Sales and Distribution Transactions in RussiaRelease MAR 14, 2022Industry’s First use of TLM for the At-Speed Verification of a PCIe-Based Avionics Design Requiring DO-254 ComplianceIn the News JAN 13, 2022 view all news RECENT YOUTUBE VIDEOS VHDL 2019 Just the New Stuff Part 1: Interfaces, Conditional Analysis, File IO, & New Environment HW/SW Co-simulation solution for Zynq SoC based systems using Riviera-PRO and QEMU Riviera PRO Product Overview How to Connect Partition's Logical Connections on Multi-FPGA Prototyping Board Using HES-DVM on AWS view all videos RECENT BLOG ARTICLES Real-time SDR system with TySOM The Convergence of Emulation and Prototyping Development of real-time SDR systems with Aldec HES Performing cross spectrum video processing on a TySOM-3 board Matching image data between the thermal and visible spectrum for non-contact human body temperature screening helps in the fight against COVID-19 How does the Mars Perseverance rover benefit from FPGAs as the main processing units? FPGAs on Mars view all articles UPCOMING EVENTS VHDL/SystemVerilog RTL verification environment by cocotbWebinar MAR 29, 2023Introduction to Logic Simulator Programming Interfaces for FPGA DesignsPart 1: The Power of Verilog’s PLI & VPI (US)Webinar APR 13, 2023Introduction to Logic Simulator Programming Interfaces for FPGA DesignsPart 1: The Power of Verilog’s PLI & VPI (EU)Webinar APR 13, 2023Introduction to Logic Simulator Programming Interfaces for FPGA DesignsPart 2: The Power of VHDL’s VHPI (US)Webinar APR 27, 2023 view all events
