Products Overview FPGA Simulation Active-HDL Active-HDL™ is a Windows® based, integrated FPGA Design Creation and Simulation solution for team-based environments. Active-HDL’s Integrated Design Environment (IDE) includes a full HDL and graphical design tool suite and RTL/gate-level mixed-language simulator for rapid deployment and ... Read more Configurations Datasheet Free Evaluation Functional Verification Riviera-PRO Riviera-PRO™ addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different ... Read more Configurations Datasheet Free Evaluation ALINT-PRO ALINT-PRO™ is a design verification solution for RTL code focused on general issues analysis including: RTL and post-synthesis simulation mismatches, design coding for optimal synthesis, avoiding problems on further design stages, and coding for portability and reuse.... Read more Configurations Datasheet Free Evaluation Emulation & Prototyping HES-DVM HES-DVM™ is a fully automated and scriptable Hybrid Verification and Validation environment for SoC and ASIC designs up to 633M ASIC gates capable of bit-level simulation acceleration, SCE-MI 2.1 transaction emulation, hardware prototyping, and virtual modeling. Utilizing the latest in co-emulation ... Read more Datasheet HES Proto-AXI The HES Proto-AXI™ software package, when combined with our HES™ prototyping boards, provides an efficient and robust environment for rapid design prototyping and/or algorithm accelerator development and bring-up. ... Read more Free Evaluation HES™ Boards HES™ is a SoC/ASIC pre-silicon prototyping solution for hardware verification and software validation teams and the High Performance Computing (HPC) platform for algorithms acceleration. The boards are based on largest Virtex-7 and Virtex UltraScale FPGA and appear in single or multi-FPGA configurations and can be interconnected on a backplane board providing up to 663 Million ASIC gates.... Read more TySOM Boards TySOM is a family of development boards for embedded applications that features Xilinx® Zynq™ all programmable module combining FPGA with ARM® Cortex processor. Plethora of included peripherals makes these boards useful in various embedded applications like Automotive, IoT, Industrial automation or embedded HPC.... Read more Daughter Cards Daughter cards provide extensions to HES or TySOM boards providing additional devices and peripherals not included in these boards. Due to using non-proprietary connectors like FMC or BPX the daughter cards can be reused across different hardware platforms.... Read more RTAX/RTSX Adaptor Boards Aldec and Microchip have joined together, offering a new, innovative, reprogrammable prototyping solution for Microchip RTAX-S/SL and RTSX-SU space-flight system designs.... Read more RTAX/RTSX Netlist Converter The RTAX EDIF Netlist Converter performs automatic conversion of the RTAX-S/SL EDIF netlist to a ProASIC3E netlist, which means replacement of the primitives has to be done, with consideration of the limitations (differences between RTAX-S/SL anti-fuse and ProASIC3/E flash-based technologies). A pin remapping utility allows automatic Physical Design Constraint (PDC) file conversion which eliminates the need for additional and time consuming manual work...... Read more Embedded TySOM™ EDK The TySOM™ Embedded Development Kit is for the embedded designer who needs a high-performance RTL simulator/debugger for their embedded applications such as IoT, Factory Automation, UAV and Automotive.... Read more Datasheet Requirements Management Spec-TRACER Spec-TRACER™ is a unified requirements lifecycle management application designed specifically for FPGA and ASIC designs. Spec-TRACER facilitates requirements capture, management, analysis, traceability and reporting ... Read more Datasheet Free Evaluation Mil/Aero Verification DO-254/CTS DO-254/CTS™ is a certifiable at-speed FPGA level in-target testing system for Levels A and B DO-254 designs. It enables reuse of the simulation testbench as test vectors for in-target... Read more Datasheet VIP/IP Products VIP/IP Products Aldec and its partners provide reusable design IP cores and verification IP that has been validated with Aldec's Active-HDL and Riviera-PRO mixed-language simulators. These robust IP Read more
