Aldec Celebrates 30 Years in EDA: Presenting Advanced Verification and Emulation Solutions at DAC 2014

Date: Apr 30, 2014
Type: Release

Henderson, NV – April 29, 2014Aldec, Inc. celebrates three decades of delivering innovative tools to automate electronic design with a Reception, Presentations, and 1-on-1 Sessions and Demos at the Design Automation Conference (DAC), June 1-5, 2014 in San Francisco, California.  

DAC Monday Night Networking Reception - Official Sponsor

Aldec is the proud sponsor of DAC’s Monday Night Networking Reception to be held Monday, June 2, 2014 from 6:00-7:00pm in the Moscone Center Esplanade Foyer. Join us as we celebrate Aldec’s 30 Year Anniversary with free cocktails, hors d'oeuvres, cupcakes and prizes.

DAC Chat Schedule - Booth #1521
9:10am Quick Intro to SCE-MI
10:10am OSVVM: Advanced Verification for VHDL (Synthworks)
11:10am SoC Emulation Made Easy
1:10pm Visual Mapping: GPS for UVM Journey
2:10pm High Level Synthesis (NEC)
3:10pm Requirements-Based Verification
4:10pm Design Rule Checks in FPGA design
5:10pm Prototyping Over 100M Gates

‘DAC Chat’ Sessions

Monday and Tuesday ( June 2-3, 2014)

Attendees are invited to make the most of their time at DAC by attending a ‘DAC Chat’ session. Aldec Engineers and Partners will be on-hand to publicly present highlights from our Session Topics. Each brief presentation will be followed by Q&A, offering an opportunity to chat with engineers. Registration is not required, just stop by Booth #1521 and grab a chair.

1-on-1 Technical Sessions and Demos

Daily (June 2-4, 2014) 

Attendees wanting to explore a topic in-depth, may also register for 1-on-1 sessions covering DAC Chat Presentation Topics, Road Maps, Demos, and more. Appointments for 1-on-1 sessions are available daily at Booth #1521 and registration is encouraged. 

About DAC

DAC is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.


Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.

Media Contact: Aldec, Inc.                               
Christina Toole, Corporate Marketing Manager
+ (702) 990-4400
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