Aldec facilitates design prototyping in FPGA and prototype testing with new HES Proto-AXI

Date: Jan 22, 2019
Type: Release

Henderson, Nevada, U.S.A. – January 22, 2019 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has unveiled the latest release of HES Proto-AXI™, the company’s software package serving as a Host-to-FPGA bridge in FPGA-based prototyping as well as High Performance Computing (HPC) applications.


Release 2018.12 features new HES board HES-XCVU9P-ZU7EV support including a comprehensive collection of FPGA prototyping resources, such as Vivado board definitions and sample designs. The other important component of the package, HES Proto-AXI module, now includes interrupt support and a Python API.


Board packages provided by the latest release facilitate the development of an FPGA-based prototype and its operating environment. Board definition files enable the quick connection of the design to on-board peripherals in the Xilinx Vivado design environment. Moreover, sample projects contain complete source codes and can be used as starting points for the user’s applications. This greatly improves productivity and shortens the total time of the overall prototyping stage.


The new HES Proto-AXI provides a unique host interface with AMBA AXI4 interconnect that can be used to bridge the prototyped design to either a PC host (via PCIe interface) or a Xilinx Zynq/ARM Cortex embedded host. In addition, interrupts support is a new feature of HES Proto-AXI 2018.12. It allows for the replacement of register pooling with asynchronous interrupt events from hardware to software, thus enabling more robust test applications. The addition of a Python wrapper to HES Proto-AXI API further empowers rapid software development.


With such strong software support and a ready-to-use HES Proto-AXI Host Interface, Aldec HES boards can also be used as hardware accelerators for algorithms in HPC as well as High Frequency Trading (HFT) applications.


“The new release of HES Proto-AXI has been eagerly awaited by our customers, who always seek reliable prototyping resources in addition to hardware products. Aldec hardware solutions always come with software support,” said Zibi Zalewski, General Manager of Aldec’s Hardware Division. “As engineers ourselves, we empathize with our users. We understand the technical and schedule pressure they are facing. We therefore developed our HES boards with the HES Proto-AXI software package, which contains reusable prototype building blocks, to accelerate prototype development.”


The new HES Proto-AXI™ 2018.12 software is available now. To learn more or to evaluate HES Proto-AXI, please visit, e-mail, call +1 (702) 990-4400, or contact one of Aldec’s worldwide distribution partners.




Aldec’s HES Proto-AXI 2018.12 provides a comprehensive FPGA prototyping environment with new HES boards support, Vivado board definitions, sample designs, and interrupt support in HES Proto-AXI interface.


Aldec’s HES Proto-AXI 2018.12 provides a comprehensive FPGA prototyping environment with new HES boards support, Vivado board definitions, sample designs, and interrupt support in HES Proto-AXI interface.


About HES™ Prototyping

Aldec offers a portfolio of HES™ prototyping boards based on the largest Xilinx FPGAs of the Virtex UltraScale+, UltraScale and Virtex-7 families. The boards are architected to allow for easy expansion using BPX backplane and standardized FMC and BPX daughter card connectors.


About HES Proto-AXI™

HES Proto-AXI™ is software package aiding in FPGA based design prototyping with HES™ boards or building hardware accelerators for High Performance Computing (HPC) and High Frequency Trading (HFT). It contains various board utilities, reusable sample designs, board definition files and AMBA AXI based interconnect and host bridge modules with C/C++ and Python API.


About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.

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