Aldec to Present at Certification Together International Conference

Toulouse, France – March 2, 2020 – Aldec, Inc. - Together with EASA, Airbus, Thales and other leading avionics regulatory experts and system suppliers, Aldec will be presenting at the Certification Together International Conference (CTIC) to be held in Toulouse, France from March 10-12, 2020.

 

The CTIC is dedicated to addressing system, software and hardware certification challenges for avionics systems. This year, Aldec will present “Transaction-Based Verification for DO-254 Compliant Designs”.

 

Transaction-based verification is a proven methodology for testing SoC designs in the semiconductor industry. It allows dealing with challenges such as clock domain crossing and non-determinism while simplifying testbench and results analysis. However, there are safety related challenges associated with this methodology, and they need to be addressed for DO-254 compliance. Aldec’s presentation will discuss the challenges and possible ways to satisfy the ED-80/DO-254 verification objectives for the transaction level approach including hardware physical testing.

 

Aldec continues to be active in the avionics community helping suppliers and airframers improve and innovate their verification process with industry-proven tools and solutions.  Aldec provides FPGA design/verification tools for DO-254 compliance including:

 

• Requirements Traceability
• HDL Coding Standards, Design Rule Checking and Clock Domain Crossing Analysis
• DO-254 Templates and Review Checklists
• VHDL/Verilog Simulation with Code Coverage and UVM Support
• FPGA Physical Device Tester
• Tool Qualification Data Packages

 

About Certification Together

The Certification Together International Conference is designed to create exchanges between companies involved in airborne projects and facing certification challenges. The conference leverages the expertise of internationally recognized expert companies in the certification of critical systems.

 

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification. Established in 1984, Aldec offers patented technology in the areas of mixed-language RTL simulation, FPGA acceleration and emulation, SoC/ASIC prototyping, design rule checking, clock domain crossing analysis, requirements traceability and functional verification for military, aerospace, avionics, automotive and industrial applications. www.aldec.com