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Controlling Riviera-PRO from MATLAB®

Mariusz Grabowski, FPGA Design and Verification Engineer
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Riviera-PRO provides a bidirectional MATLAB co-simulation interface that allows the integration of the MathWorks' system-level computing environment with Aldec's HDL-based simulation environment. The interface enables engineers to verify that their ASIC/FPGA implementations match system specifications. Riviera-PRO can either act as a master or slave in co-simulation with MATLAB.

Slave mode enables MATLAB users to play with a bit-accurate model of their IP without even having to leave the MATLAB environment. Riviera-PRO's MATLAB interface supports the flow in which you can keep MATLAB as a main environment and can call Riviera-PRO for HDL simulations. This way, you may not even need to deal with the HDL simulation environment at all (given your design-specific interface implemented by someone else at the HDL side).
For step-by-step details see related App Note: Controlling Riviera-PRO from MATLAB®.

Mariusz Grabowski is an FPGA Design and Verification Engineer at Aldec. He works in the field of verification for DO-254 compliance as well as developing digital processing systems. He is proficient in digital design and verification, using hardware description languages such as Verilog/SystemVerilog and VHDL, and the use of verification methodologies such as UVM.

Mariusz is a student at the AGH University of Science and Technology in Krakow, Poland. He also gains practical experience in the AVADER Scientific Group (where he designs novel vision systems on FPGAs) and in the Integra Scientific Group (where he acquires knowledge about microprocessor systems and electronics).

  • Related resources
  • Products:
  • Riviera-PRO
  • Advanced Verification

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