Semiconductor Engineering: Too Big To Simulate?Date: Oct 27, 2016 Type: In the NewsBy Ann Steffora Mutschler “Simulation time also depends on the description abstraction level,” said Zibi Zalewski, general manager of the Hardware Division at Aldec. “RTL-behavioral (synthesizable) will simulate faster than structural gate level. Functionally control logic/FSM will simulate faster than computation intensive data paths (DSPs).” As such, simulators for big projects are commonly used for module and IP level verification, while hardware verification methodologies are covering SoC system level. But today, even sub-systems are becoming very advanced units that cause the simulation to take a day or longer, complicated by the fact that the scope of testing is increasing too, he said. And while UVM verification, which has become a standard for big ASIC and FPGA projects, is a great tool in the verification engineer hands, it requires significant simulation power. Fortunately, there are multiple options available in case simulation becomes a bottleneck because of design and testing environment complexity... This is an excerpt of an article that appeared on Semiconductor Engineering.Semiconductor Engineering: Emulation’s Footprint GrowsDate: Oct 27, 2016 Type: In the NewsBy Brian Bailey It wasn’t that many years ago that Emulation was an expensive tool available to only a few, but it has since become indispensable for a growing number of companies. One obvious reason is the growing size of designs and the inability of simulation to keep up. But emulation also has been going through a number of transformations that have made it more affordable, more useable, and a more complete verification tool. The changes have evolved along two different axes. One is cost of ownership, which includes maximizing utilization of the equipment while minimizing maintenance costs and the time it takes to use it effectively. The other axis involves extensions of emulation’s capabilities into areas that reach beyond simulation. Those include hardware/software co-verification and power analysis. But emulation is still trying to find exactly where it fits into the flow and how it works with other tools. There is still a lot of room for improvement.... For the rest of this article, visit Semiconductor Engineering.