SystemVerilog IEEE 1800™ (2005, 2009, 2012, 2017 and 2023) - Verification

Category : Supported Standards

Active-HDL supports SystemVerilog IEEE Std 1800™-2005, IEEE Std 1800™-2009, IEEE Std 1800™-2012, IEEE Std 1800™-2017, and IEEE Std 1800™-2023 in three areas: hardware description extensions, assertions, and advanced verification. The verification portion of the standard includes constructs such as random constraints, coverage groups, UVM, to enable self-checking and coverage driven testbench design.