Aldec Design and Verification Blog Trending Articles FPGA Design Verification in a Nutshell Versal ACAP Simulation Challenges Real-time SDR system with TySOM The Convergence of Emulation and Prototyping Development of real-time SDR systems with Aldec HES Performing cross spectrum video processing on a TySOM-3 board How does the Mars Perseverance rover benefit from FPGAs as the main processing units? All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications UVM. It’s Organized and Systematic. Mastering the fundamentals One of the reasons I like using UVM is its tendency toward an organized structure and uniformity. Some may find it annoying to adhere to such a strict format in UVM, but I think it’s a good way to keep the basics of UVM engrained in your brain.... Tags:Debugging,resources,UVM,Verification Like(2) Comments (0) Read more Verifying Large FPGAs Isn't Easy Guest Blog by Doug Perry, Senior Member Technical Staff at Doulos The latest crop of FPGA devices are enormous when compared to ASICs that were built not that long ago. Verifying these ASICs required detailed plans, multiple tools, and sometimes special languages.... Tags:FPGA,resources,SystemVerilog,UVM,Verification,VHDL Like(2) Comments (0) Read more ‘Don’t Be Afraid of UVM’ Webinar on YouTube Free webinar from the Aldec archives Just in time for Halloween, Aldec has released a popular past webinar Don’t be Afraid of UVM for Hardware Designers on YouTube. Designers are usually very busy doing their work and have little time left for experimentation... Tags:Design,Hardware,resources,SystemVerilog,UVM,Verification Like(2) Comments (0) Read more Save hours of Place & Route time… in seconds Vivado Incremental Compile for faster Emulation Setup Place & Route implementation can sometimes feel like it takes forever. Consider some of these common scenarios: ● After working overtime to create an emulation build for all emulation users, your manager brings you some... Tags:Emulation,Hardware,resources,Xilinx Like(1) Comments (0) Read more Simulate Smarter than a Secret Agent Learn how features like Plot Window can save your life In James Bond movies, Agent 007 has some awesome gadgets but never listens to Q’s instruction on how to use them properly. I’ve often wondered what it would be like if Bond actually did learn about the various features of his tools... Tags:resources,Simulation,Verification Like(2) Comments (0) Read more