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Interoperability of Project Tasks

Between Riviera-PRO and ALINT

Mariusz Grabowski, FPGA Design and Verification Engineer
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The Tasks window in Riviera-PRO and ALINT can be used to manage tasks that need to be completed in the design. Tasks can be anything that a user would like to address later in the project. In a team-based environment where multiple engineers are working with different aspects of the same design , it is difficult to coordinate tasks among different engineers. This becomes even more difficult when a team is working on one tool to create the design, and a team lead is using another tool to do the code review and design rule checking. For step-by-step details see related App Note, Interoperability of Project tasks between Riviera-PRO and ALINT.

Tags:Design,Functional Verification

Mariusz Grabowski is an FPGA Design and Verification Engineer at Aldec. He works in the field of verification for DO-254 compliance as well as developing digital processing systems. He is proficient in digital design and verification, using hardware description languages such as Verilog/SystemVerilog and VHDL, and the use of verification methodologies such as UVM.

Mariusz is a student at the AGH University of Science and Technology in Krakow, Poland. He also gains practical experience in the AVADER Scientific Group (where he designs novel vision systems on FPGAs) and in the Integra Scientific Group (where he acquires knowledge about microprocessor systems and electronics).

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