Resources

DO-254 enforces a strict requirements-driven process for the development of commercial airborne electronic hardware. For DO-254, requirements must drive the design and verification activities, and requirements traceability helps to ensure this. Learn in this webinar traceability best-practices for design assurance level (DAL) A FPGAs. We will provide insights to questions such as: What is the recommended approach when tracing from FPGA requirements to HDL design sources, implementation, test cases and testbench and test results? What type of output files are needed for traceability? What certification authorities look for when they review the traceability data? Play webinar   

As described in DO-254, any inability to verify specific requirements by test on the device itself must be justified, and alternative means must be provided. Certification authorities favor verification by test for formal verification credits because of the simple fact that hardware flies not simulation models. Requirements describing FPGA I/Os must be verified by test. The problem is that testing the FPGA device at the board level provides very low FPGA I/O controllability and visibility, therefore, giving you the inability to verify specific requirements by test. In this webinar, Aldec will demonstrate how you can verify all FPGA level requirements by test. All of the requirements verified during simulation can be repeated and verified in the target device. We will demonstrate a unique solution that enables requirements-based test by reusing the testbench as test vectors for testing the device at-speed. In this webinar, Altera will also share insights into the market trends observed from different applications and discuss some of the solution strategies that will address the system reliability concerns. Play webinar   

Functional verification of digital designs in real hardware has been a serious undertaking when developing under DO-254 standard. Section 6.2 Verification Process of RTCA/DO-254 specifies that requirements must be preserved and verified from RTL simulation stage to hardware verification stage. Learn in this webinar examples of common challenges that are usually encountered during hardware verification, and more importantly, the solution to overcome these challenges. This webinar will highlight a unique methodology to replay RTL simulation in the target device at-speed that can significantly reduce the verification cycle. Play webinar   

Complex custom micro-coded devices such as PLDs, FPGAs and ASICs used in commercial airborne hardware are subject to the development process outlined in the DO-254 guidance. This means that the design and verification for these types of devices must follow the strict requirements-based process described in DO-254. The primary purpose of DO-254 is to provide assurance that the device under test meets its intended functions under all foreseeable operating conditions. Requirements express the functions of the device under test, and therefore it is crucial that requirements drive the design and verification activities. Requirements traceability helps to ensure that design and verification activities are requirements-based. In this webinar, we will describe requirements traceability according to DO-254 guidance in the context of FPGAs, and we will provide explanations as to what it means for the applicants to meet the objectives for traceability. We will also describe the underlying purpose of traceability and the resulting benefits that can be achieved when done correctly. Play webinar   

DO-254 enforces a strict requirements-driven process for the development of commercial airborne electronic hardware. For DO-254, requirements must drive the design and verification activities, and requirements traceability helps to ensure this. This paper explains the rationale behind requirements traceability including its purpose and resulting benefits when done correctly.

As a best-practice standard, efficient ASIC and FPGA project planners will allocate 1/3 of the project cycle to design and 2/3 of the project cycle to verification. The best of these planners will bias toward even more verification-hours and innovative verification strategies whenever possible, because the great reality of schedule-time allocated to verification is that THERE’S NEVER ENOUGH TIME. When an FPGA or ASIC is destined for an avionics product, effective design of that DO-254-qualified device is even more dependent-upon good verification strategies and practices. Good verification strategies will use those precious hours more effectively – and will also consistently prove to be more useful when combined with a comprehensive exploitation of well-written requirements and compliance with a well-constructed verification process, planned in advance of the work. In this webinar, we will discuss various verification strategies and how they can be applied to successful verification of a design in a DO-254 Levels A/B flow. Play webinar   

With several influences on PHAC content and project specific content, this webinar will address how to write a PHAC to address DO-254 and certification authority required content. Specific examples of how to word certification basis, means of compliance, and certification liaison will be included. The webinar will demonstrate how to address tool qualification and the PLD life cycle data. Suggestions will be included for setting up the compliance data to simplify future reuse or addressing in-service changes. Play webinar   

Verification coverage by test is essential to satisfying the objectives of DO-254. However, verification of requirements by test during final board testing is challenging and time-consuming. This white paper explains the reasons behind these challenges, and provides recommendations how to overcome them. The recommendations center around Aldec’s unique device testing methodology that can significantly increase verification coverage by test.

Requirements are central to DO-254 design and verification objectives. Well-formed and well-written requirements can help streamline the design and especially the verification aspects of a project. The discussion focuses on requirements and the attributes that make requirements support the design and verification processes. Play webinar   

Abstract: The main purpose of DO-254 Verification Process (Chapter 6.2 of DO-254 Specification) is not merely to verify the functionality of the design but more importantly to obtain assurance that the hardware implementation meets the requirements defined in the early stages of DO-254 targeted project. It is absolutely critical to ensure that the same requirements are preserved in all stages of design and verification from planning to hardware testing. Learn in this webinar an effective approach to verifying your design from the RTL to hardware preserving the same requirements. Our experts will teach you how to use Assertions and Code Coverage for a systematic and comprehensive verification. Our experts will also demonstrate the advantages of component level verification with DO-254 CTS (Compliance Tool Set) ideal to hardware verification of Level A/B DO-254 designs. Play webinar   

Safety-critical industry standards such as DO-254 for avionics, IEC 61508/61511 for industrial and ISO 26262 for automotive enforce a requirements-based verification process to ensure that the end-product is reliable, safe and will function as intended under all foreseeable conditions. Adhering to a strict requirements-based verification approach entails that organizations must follow certain processes and provide a long list of reports and deliverables. With the growing size and complexity of today’s FPGAs and SoCs, the requirements that must be managed, reviewed, validated, traced, implemented and verified have also undeniably multiplied. Requirements frequently change impacting other project elements which leads to more rework, redesign and retests. The traceability from requirements to test data must be created and preserved so testing activities can get chaotic without a systematic method to manage it. If organizations do not have a system in place to efficiently manage these underlying activities, this translates to more time and money and unfortunately in many cases project failure. Learn in this webinar the common processes of requirements-based verification for safety-critical FPGAs and SoCs. We will describe the associated challenges, and we will show how Aldec’s tool Spec-TRACER can facilitate industry best engineering best practices to overcome these challenges. Play webinar   

For DAL A/B FPGAs, applicants are recommended to verify the device behavior at the silicon level (physical testing) in order to satisfy the objectives defined in RTCA/DO-254 Section 6.2.1 Verification Process. This is recommended because there are significant errors that may potentially impact safety but can only be found through physical testing. However, physical testing of the FPGA in the target board is quite challenging and not feasible in most cases. That is why both FAA and EASA allow for alternate verification means if physical tests in the target board are not feasible. Learn in this webinar a methodology that enables requirements-based physical testing with 100% FPGA I/O controllability and visibility necessary to satisfy the objectives. Play webinar   

Abstract: DO-254 is officially enforced by the FAA and other worldwide certification authorities as a means of compliance for the development of airborne electronic hardware incorporating devices such as FPGAs, PLDs and ASICs. DO-254 is rapidly becoming the de-facto standard to all safety critical applications not only in avionics but also in medical, automotive and nuclear industries. Despite of its wide applications, DO-254 is still poorly understood and implementing it remains unclear. This webinar will try to provide clarifications on the most commonly misunderstood objectives of the standard. This webinar is entirely dedicated to answer your questions related to applying DO-254 to FPGAs and PLDs. Play webinar   

Requirements are central to the development process described in DO-254. The Validation and Verification Process ensures that requirements are correct, complete, verifiable, unambiguous, logically consistent, the design data correctly implements the requirements and the final FPGA functions as intended as defined in the requirements. Learn in this webinar the objectives, purpose and methods of Validation and Verification. The webinar will describe the validation and verification process and techniques for selected example requirements. Play webinar