How to add primitives and IP cores from Xilinx to Active-HDL?

Primitives for schematic editor can be added directly from the Block Diagram Editor. Click on the symbol tool box to see the list of available primitives. Right click menu will give the option for selecting the libraries; here you can add the family you are working with. After adding family, for example Virtex 5 you would be able to use all the primitives from that device.

IP cores from the Xilinx coregen and architecture wizard can be added directly using TOOLS button from the design flow manager. TOOLS and ANALYSIS buttons allow you to use auxiliary application of your 3rd party vendor tool from within Active-HDL.

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