Aldec Customer Use Cases Related Solutions: HES-DVM™ HW/SW Validation Platform with Swith AXI SCE-MI Transactors HES-7™ with Backplane Board The User: An electronics firm R&D division that needed: A high-speed, hardware verification solution based on Virtex-7 A solution for RTL simulations that were running too long FPGA boards required for prototyping, with ability to reuse hardware for other verification modes like acceleration and emulation The ability to reuse legacy peripherals boards with new Virtex-7 hardware How Aldec Delivered: Scalable hardware – Backplane with 4x HES7-4000 boards with capacity up to 96MG (8x Virtex-7 2000 devices) Custom daughter board designed for user to connect Aldec HES-7/Backplane with their legacy boards HES/DVM with verification modes: Acceleration for bit level verification (reuse of the testbench from RTL simulations) SCE-MI emulation (Macro Based) for transacation level verification Transactors – AXI transactors and a custom solution developed by Aldec for the user’s design - The Final Result - The user began with HES acceleration. As acceleration depends strongly on how much of the testbench and design is left in the simulator, Aldec also presented SCE-MI emulation mode. The same design was executed in acceleration and emulation modes. Aldec provided AXI transactors for emulation and developed additional custom transactors required for design. The result was over 150x speedup over RTL simulations.
