Aldec Customer Testimonials “We used Riviera-PRO for functional, gate-level and timing simulation and we were very pleased with its rich VHDL support, compile and simulation speed.” - Jan Andersson, Director of Engineering at Cobham Gaisler About Cobham Gaisler Cobham Gaisler provides IP cores and supporting development tools for embedded processors based on the SPARC and RISC-V architectures. Cobham Gaisler has a long experience in the management of ASIC development projects, and in the design of flight quality microelectronic devices. The company specializes in digital hardware design (ASIC/FPGA) for both commercial and aerospace applications. Cobham Gaisler ABKungsgatan 12SE-411 19 Goteborg, Swedenwww.gaisler.com Aldec Tools: Riviera-PRO “NOEL-V is a synthesizable VHDL model of a 64-bit processor that implements the RISC-V architecture, with an advanced 7-stage dual-issue in-order pipeline and provides up to 4.69 CoreMark/MHz. “As a leading vendor of space-grade microprocessors, we needed to verify NOEL-V using a reliable and high-performance RTL simulator with advanced debugging and DRC checking capabilities.”
