Company Overview Aldec, Inc. is an industry-leading Electronic Design Automation (EDA) company delivering innovative design creation, simulation and verification solutions to assist in the development of complex FPGA, ASIC, SoC and embedded system designs. View Product Line (pdf) With an active user community of over 35,000, 50+ global partners, offices worldwide and a global sales distribution network in over 43 countries, the company has established itself as a proven leader within the verification design community. Market Aldec market share is estimated at 38% of all mixed-language RTL Simulators sold to FPGA designers worldwide. (Excludes OEM simulators supplied directly from FPGA vendors). Aldec delivers high quality EDA solutions for government, military, aerospace, telecommunications, automotive and safety critical applications. Large companies including IBM, GE, Qualcomm, Texas Instruments, Applied Micro, Hewlett Packard, Toshiba, Intel, NEC, Mitsubishi, LG, Hitachi, NASA, Invensys, Westinghouse, Raytheon, Panasonic, Lockheed Martin, Samsung, as well as mid-size and small firms utilize Aldec EDA verification suites to boost product performance, cut design development cycles and reduce cost. Technology Patents US Patent#4,791,357: Electronic circuit board testing system and method US Patent#4,827,427: Instantaneous incremental compiler for producing logic circuit US Patent#5,479,355: System and method for closed loop operation of schematic designs with electrical hardware US Patent#5,051,938: Simulation of selected logic circuit designs US Patent#6,578,133: MIMD Array of Single Bit Processors for Processing Logic Equations in Strict Sequential Order US Patent#6,915,410: Compiler synchronized multi-processor programmable logic device with direct transfer of computation results among processor US Patent#7,003,746: Method and apparatus for accelerating the verification of application specific integrated circuit designs Milestones 2021 Releases Multi-FPGA Partitioning Solution for ASIC/SoC Prototyping on AWS Releases Active-HDL 12.0 with VHDL 2019 Support 2020 Delivers RISC-V IP/SoC Verification Solution Releases RTL Simulation Acceleration for Microchip FPGAs Adds Tool Qual Data Package to ALINT-PRO for DO-254 Projects Releases Riviera-PRO 2020.04 with VHDL 2019 Support 2019 Adds Embedded Development Platform for Microsemi® Polarfire™ and SmartFusion2™ Provides the most-comprehensive portfolio of FMC daughter cards Releases SyntHESer, high-speed synthesis tool Celebrates 35 years in EDA 2018 Adds RDC Verification to ALINT-PRO Releases Networking embedded solution QuickLogic Announces Partnership with Aldec for eFPGA Simulation Flow 2017 Adds SystemVerilog DRC to ALINT-PRO FPGA-based Accelerator for High Frequency Trading platforms HW/SW Co-Simulation and Co-Debugging of Xilinx Zynq PS and PL Introduces Finite Statement Machine Coverage for Safety-Critical FPGAs Multi-FPGA Partitioning for ASIC Prototyping in HES-DVM 2016 Releases ADAS embedded solution Adds largest Xilinx® Ultrascale™ to HES Emulation/Prototyping platform Releases TySOM Product Line based on Xilinx® Zynq™ main boards and FMC daughter cards Pre-Silicon Verification Spectrum for digital ASIC designs 2015 Introduces Hybrid Co-Emulation with ARM® Fast Models Delivers 50+ successful DO-254 projects supported by CTS physical test systems Releases ALINT-PRO with CDC Verification Largest FPGA-based prototyping system at 288M ASIC gates 2014 Celebrates 30 years in EDA Releases Active-HDL 10.1 with 64-bit simulation support Elbit Systems deploys Aldec DO-254/CTS Delivers Visual Mapping Solution for UVM Verification Environments Solves DO-254 challenge by adding Requirements Reviewer to Spec-TRACER™ Supports UVM 1.2 Library 2013 Distributes NEC CyberWorkBench® high level synthesis solution Releases Spec-TRACER™ Requirements Lifecycle Management Launches Fast Track online training Hitachi deploys ALINT™ on next-gen FPGA design 2012 Enters SoC/ASIC Prototyping Market with HES-7 Best FPGA Design & Verification Platform Provider, China Releases Aldec Cloud Launches DO-254 Training Program Jointly launches OSVVM, VHDL Verification 2011 Opens Office in the UK Supporting Europe Avnet Asia Pacific Distributes Aldec FPGA Simulator UVM 1.0, OVM 2.1.2 & VMM 1.1.1a Support Mirror-Box™ Debugging Technology Releases 4 MHz Design Emulator Best FPGA Design & Verification Platform Provider, China 2010 Altium Embeds Aldec Simulator in Altium Designer Active-HDL: Best FPGA Design & Simulation Tool in China Opens Offices in Taiwan and Israel Releases Support for VHDL IEEE 1076-2008 2009 Avnet Japan Distributes Aldec FPGA Simulator Releases DO-254 Design Rule Library for ALINT Opens Office in India 2008 Releases ALINT™: Design Rule Checker (STARC – Japanese Consortium of 11 ASIC Companies) 2007 Opens Office in Japan Released DO254-CTS (Compliance Test System) Signed Strategic OEM agreement with Lattice® Semiconductor Nasdaq: LSCC Released Actel Prototyping Solution – RTAX-S Antifuse to Flash device 2006 EETIMES Ranked Aldec no. 3 in FPGA User Survey (behind Synplicity and Altera) Opens Offices in Beijing and Shanghai, China Awarded Patent ClockConversion™ (ASIC Clocks to FPGA Technology Conversion) 2005 Released Optimized Verilog Simulator, based on support 32 and 64-bit Simulation Technology 2004 Released SystemVerilog and SystemC System Level Design Tools 2003 Released HES™ Hardware Emulation, Acceleration and Prototyping Solutions 2002 Released Riviera-PRO™: Common Kernel, Multi-platform Mixed HDL Software Simulator Named 2002 Southern Nevada Distinguished Business of the Year, Nevada Economic Commission 2000 Signed Strategic OEM agreement with Synplicity® Nasdaq: SYNP 1999 Signed Strategic OEM agreement with Cypress® NYSE: CY 1997 Released Active-HDL™: Graphical Design Entry and Mixed Language Simulator 1996 Signed Strategic OEM agreement with Xilinx® Nasdaq: XLNX 1992 Released Active-CAD™ Releases Active-CAD™ - a Windows Based Schematic & Gate Level Simulator 1985 Releases SUSIE™ (Standard Universal Simulator for Improved Engineering), DOS Simulator 1984 Company is Established
