Aldec Design and Verification Blog Trending Articles Development of real-time SDR systems with Aldec HES Performing cross spectrum video processing on a TySOM-3 board How does the Mars Perseverance rover benefit from FPGAs as the main processing units? SynthHESer - Aldec’s New Synthesis Tool Linting RISC-V designs with ALINT-PRO Enabling TySOM Zynq-based Embedded Development Board for AWS IoT Greengrass Connecting Emulated Design to External PCI Express Device All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications When is robustness verification for DO-254 projects complete? Understandably, hardware designed for an aircraft, or indeed any safety critical application, must be robust. I also believe that all engineers wish to verify their designs as thoroughly as possible, anyway. However, there are limiting factors; most notably the high complexity of most designs. Since we are unable to discover and verify the design against all abnormal conditions, the main question is: when is robustness verification truly complete?... Tags:FPGA,safety-critical,Verification Like(5) Comments (0) Read more No Risk No Fun At the end of February, I attended the Aero Show in India - and what a show it was. So many exhibitors from around the world, including all main players from the commercial and military sides of the aerospace industry. Visitors could see everything required to build a modern aircraft; from small components like specialized ICs, cables and connectors up to big parts, such as the jet engines, landing gear assemblies and structural components.... Tags:FPGA,safety-critical,Verification,DO-254 Like(5) Comments (0) Read more The hardest part of DO-254 is… Insight from Aldec’s 3-Day DO-254 Practitioner’s Course The hardest part of DO-254 is not the requirements. It’s not the design. It’s not the verification. We just wrapped up this year’s 3-day DO-254 Practitioner’s Course, and each year I learn something new. In this year’s training we had attendees... Tags:FPGA,safety-critical,Verification Like(1) Comments (0) Read more A Comprehensive RTL Verification Solution for VHDL ALINT-PRO™ Design Rule Checking Solution On Thursday, November 19, I’ll be hosting a webinar to demonstrate Aldec’s RTL Verification Solution for VHDL, ALINT-PRO™ Design Rule Checking Solution. ALINT-PRO is Aldec’s design verification solution for RTL code... Tags:Coverage,Debugging,Linting,safety-critical,Verification,VHDL Like(1) Comments (0) Read more The Problem with CDCs And how it affects your DO-254 project Part of the Planning Process in DO-254 is knowing the appropriate FPGA tools and capabilities that you need and intend to use for your FPGA design. Particularly if your FPGA device... Tags:FPGA,safety-critical,Verification Like(1) Comments (0) Read more Developing high-reliability FPGAs for DO-254 Can you bet your life on your designs? You have been developing FPGAs for a long time, and you know your designs from top to bottom. You know every interface protocol, configuration and optimization.... Tags:FPGA,safety-critical Like(2) Comments (0) Read more It’s Here! ALINT-PRO-CDC™ for CDC Verification Aldec’s new solution for complex multi-clock designs I am happy to announce, that today Aldec has released ALINT-PRO-CDC™ 2015.01. This solution enables verification of clock domain crossings and handling of metastability issues in complex, modern multi-clock designs.... Tags:ASIC,FPGA,Linting,safety-critical Like(1) Comments (0) Read more Webinars, YouTube, Articles... What’s your preference? Useful resources to help you get ahead “USEFUL” is a word you’ll hear a lot over here at Aldec. It’s the number one way we rank our success when developing a new product or feature. “How USEFUL is it?” is the most common phrase we challenge one another... Tags:Debugging,Design,Embedded,Hardware,safety-critical,Verification Like(1) Comments (0) Read more Spec-TRACER now directly integrated with IBM DOORS You asked. We implemented. In response to user feedback, Aldec has developed a direct integration between IBM® Rational ® DOORS ® and our requirements management tool, Spec-TRACER™, to enable users to extend the traceability data... Tags:Aviation,FPGA,safety-critical Like(0) Comments (0) Read more Stress-Relief for Requirements-Based Verification Verification of Safety-Critical FPGAs under Strict DO-254 Guidance If they’re being honest, anyone who has verified an FPGA under strict DO-254 guidance will tell you that it is stressful. Show me an engineer on their first DO-254 project – and I’ll show you someone pulling out their hair... Tags:Aviation,Coverage,Design,FPGA,safety-critical,Project management ,Validation,Verification Like(1) Comments (0) Read more
