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All News	2011-01-13 Q1-2011 - Aldec™ Design and Verification Newsletter	2011-07-07 Design your own Functional Verification Tool
2011-07-11 Aldec Adds UVM Transaction-Level Visual Debugging	2011-07-21 Q3-2011 - Aldec™ Design and Verification Newsletter	2011-07-25 Aldec’s Emulation and Verification Tools Adopted by UC San Diego for the new Master’s Program in Wireless Embedded Systems
2011-08-03 Functional Verification Survey Winners	2011-09-12 Randall Fulton, FAA Consultant DER, to present DO-254 Training Seminar hosted by Aldec in Las Vegas, NV	2011-09-13 Aldec and Agnisys Partner to offer Closed Loop Verification Management to meet challenges in Verification of Modern Designs
2011-09-14 Aldec Honored for Superior FPGA Design and Verification tools	2011-10-06 Aldec Confirms Platinum Sponsorship of 9th Annual International System-on-Chip (SoC) Conference Q4-2011 - Aldec™ Design and Verification Newsletter	2011-10-16 IEEE: FPGA Level In-Hardware Verification for DO-254 Compliance
2011-10-18 Aldec presents ‘Automated Code Reviews for Fail-Safe Designs’ at ReSpace/MAPLD 2011 Conference in Albuquerque, NM. Aldec presents 'FPGA Level In-Hardware Verification for DO-254 Compliance' at the 30th Annual DASC in Washington	2011-10-31 Aldec Releases Active-HDL 9.1 Supporting Simulation of the Newest FPGA Devices	2011-11-14 Aldec Delivers Complete Support for UVM 1.1, Enabling VMM and OVM Interoperability
2012-01-09 Aldec and SynthWorks deliver Randomization and Functional Coverage Capabilities to VHDL Designers with OS-VVM™	2012-01-13 Verification Engineers are Invited to Take a Brief Survey and Receive a Chance to win an Ipad2!	2012-01-19 Q1-2012 - Aldec™ Design and Verification Newsletter
2012-01-23 Aldec adds Documentation for Safety-Critical Designs in ALINT™ 2012.01	2012-02-20 Aldec to Address Biggest Safety and Mission-Critical Verification Challenges in Electronic Warfare at EWCI in India	2012-02-29 Aldec Launches DO-254 Practitioner’s Course with FAA DER, Randall Fulton
2012-03-12 Aldec Takes FPGA & ASIC Debugging to the Next Level Electronics Weekly: Aldec Design Tool Supports UVM and new SystemVerilog	2012-03-13 Electronics Weekly: FPGA Verification for DO-254 is in the Hardware	2012-03-20 EDA Café: Testing Made Easy: Open Source VHDL Verification Methodology
2012-04-11 EE Times: Automatic C-to-VHDL Testbench Generation Shortens FPGA Development Time	2012-04-12 Q2-2012 - Aldec™ Design and Verification Newsletter	2012-04-18 Aldec Solutions Support Hardware Architecture of Zynq EPP at X-Fest 2012
2012-05-01 Aldec Israel to Serve Up the Latest in Functional Verification at ChipEx2012 in Tel Aviv	2012-05-08 EE Journal: Aldec Harnesses Massive Server Capacity	2012-05-09 Verified: the need for continued VHDL support
2012-05-21 Tanner EDA and Aldec Deliver High-performance A/MS Solution for Mixed-signal IC Design and Verification	2012-05-22 EE Times: FPGA Testing for DO-254 Compliance Sigasi integrates Aldec Simulator to Accelerate Feedback Cycle	2012-05-23 Aldec at DAC 2012: 10 Face-to-Face Sessions
2012-05-31 Open-Source VHDL Verification Methodology (OS-VVM) User Group to unveil Advanced Test Methodologies for VHDL Designers at DAC	2012-06-06 Tech Design Forum: Where there’s a will… there’s a way to better VHDL verification EE Times: FPGA-based SoC Verification Challenges	2012-06-12 DAC 2012 Wrap Up
2012-06-13 EDACafe: Aldec Update with Al the Robot and App. Engineering Director, Igor Tsapenko	2012-07-03 Aldec invited to present "FPGA Level In-Target Testing for DO-254 Compliance" at Avionics Conference in South Korea	2012-07-10 Aldec and Agilent Technologies Bridge the Gap Between ESL and RTL by Linking Simulation Environments
2012-07-17 TVS Validates UVM based VIP with Aldec’s Riviera-PRO Platform	2012-07-18 Q3-2012 - Aldec™ Design and Verification Newsletter	2012-08-15 SOC Central: Verific Design Automation's SystemVerilog, VHDL Parsers Linked with Aldec's Hardware Emulation Solution
2012-09-17 Aldec Enters ASIC Prototyping Market with HES-7™ Leveraging Xilinx’s Virtex®-7, HES-7 expands up to 96m ASIC Gate Capacity	2012-09-24 Aldec Enhances Award-Winning Active-HDL with Flexible File Management to Manage Complex FPGA Projects	2012-10-29 EE Journal Chalk Talk “Integrated Design Environment for FPGA” With Aldec Product Manager, Satyam Jani
2012-11-05 Aldec gives SoC Software Engineers early access to Hardware Aldec Inc. presents on Platform Validation at Verification Futures 2012 Aldec Boosts VHDL Simulation Performance	2012-11-14 Creonic Joins Aldec UNITE™ Partner Programme and Accelerates the Development of its IP Cores with Aldec Linting and Advanced Verification Tools	2012-12-03 Aldec unwraps SoC/ASIC verification platform at ‘Verification Futures 2012’ in Europe
2012-12-04 "Best of 2012" Top Webinars	2012-12-10 Aldec Adds ARM Cortex-A9 Support to HES-7 ASIC Prototyping Platform	2012-12-12 EE TIMES: Mil-Aero Top 10 'How-To' articles for 2012, FPGA testing for DO-254 Compliance by Aldec SEMIWIKI: Zynq out of the box, in FPGA-based Prototyping
2012-12-17 Now Available - Verification White Papers	2012-12-20 Aldec Optimizes FPGA Routing Resources for Power and Performance	2013-01-02 Aldec Emulation and Verification Tools Adopted by Taiwan National Chiao Tung University for ESL Design Master’s Program
2013-01-07 Hitachi Cable, Ltd. Deploys ALINT™ on Next Generation FPGA Design	2013-01-29 Follow Aldec. Win a Kindle Fire HD.	2013-02-04 Aldec Launches Free Online UVM Training
2013-02-25 Aldec Adds Assertions Training to Fast Track Online Program	2013-02-26 Aldec offers Advanced Screening of Functional Verification Platform’s Latest Release at DVCon 2013	2013-02-27 The latest in ASIC Prototyping News, Events and Resources
2013-03-08 EDA Café interviews Aldec Director of Sales, Keith McCann, at DVCon 2013	2013-03-11 Aldec Releases Plot Window to Increase Productivity of Traditional Waveform-Based HDL Debugging	2013-03-21 Semiwiki: Plotting to take over the time-domain only world New Electronics: ASIC/SoC Prototyping Platforms Increase Productivity
2013-03-28 The latest in SoC and ASIC Prototyping News, Events and Resources	2013-04-04 DSP Survey, Solutions and Resources	2013-04-08 Aldec Presents at Military & Aerospace Programmable Logic Devices Symposium (MAPLD)
2013-04-29 Aldec Israel to Showcase Innovative Functional Verification Solutions at ChipEx2013 in Tel Aviv	2013-05-15 Aldec @ DAC 2013: Advanced Verification, HW/SW Emulation, SoC/ASIC Prototyping and more	2013-05-20 Aldec launches Spec-TRACER™ – Requirements Lifecycle Management for Safety-critical FPGA and ASIC Designs
2013-06-11 Missed DAC? Aldec to offer Technical Sessions Online	2013-07-10 Aldec Enables Class Hierarchy Visualization for UVM-Based Verification Environments	2013-07-11 Aldec Verifies Compatibility of Northwest Logic’s PCI Express Cores with HES-7™ SoC/ASIC Prototyping Platform
2013-07-31 Aldec and NEC Corp. Ink Distributorship Agreement for CyberWorkBench® ASIC/FPGA High Level Synthesis Solution	2013-08-26 Aldec’s Active-HDL Celebrates Sweet 16 with Another Top FPGA Design Award	2013-09-23 Aldec HES-7 SoC Prototyping Solution Adopted by Kumamoto University in Japan
2013-10-23 Aldec delivers Global Project Management for Complex FPGA Designs with the latest release of Active-HDL™	2013-11-04 SemiWiki: I could show you the FPGA, but then I’d have to configure you	2013-11-12 Aldec Offers a Visual Approach to Debugging X-Issues in Simulation
2013-11-25 NEC Corporation Adopts Aldec® ALINT™ for Communication Systems LSI Design	2008-09-22 Aldec selected by Thales to deploy DO-254/ED-80 CTS for Level B Certification Compliance of Advanced Avionics System	2013-12-10 Oki Information Systems® Leverages Aldec® Advanced Verification Solutions for Xilinx® FPGA Design
2013-12-19 Aldec Holiday Greetings	2014-01-06 Top 10 Aldec Design and Verification Blog Articles from 2013	2014-01-16 Top Aldec.com White Paper Downloads from 2013
2014-01-28 Aldec solves another DO-254 challenge with Requirements Reviewer in Spec-TRACER™	2014-03-05 Aldec Presents a Visual Mapping Solution to Capture a Bird’s-eye View of UVM Verification Environments	2014-04-30 Aldec Celebrates 30 Years in EDA: Presenting Advanced Verification and Emulation Solutions at DAC 2014
2014-05-30 Why Aldec’s Long-Term VP, Dave Rinehart, Is No Longer with The Company?	2014-06-16 Elbit Systems deploys Aldec DO-254/CTS and Passes EASA Verification Audit for Level A System	2014-06-17 Semiwiki: Aldec Can Ensure Smooth System Integration
2014-05-02 Semiwiki: Aldec is Celebrating 30 Years @ #51DAC!	2014-04-22 Semiwiki: Learning an HDL Simulator Semiwiki: You didn’t say it has to work	2014-03-19 Semiwiki: Aldec the leader in DO254
2014-03-11 Semiwiki: Now even I can spot bad UVM	2014-02-28 Semiwiki: Locked on FPGA design brand recognition	2014-06-23 Aldec to offer ‘DAC CHAT’ Technical Sessions Live Online
2014-06-26 Semiwiki: Real FPGAs don’t eat fake test vectors	2014-07-31 Semiwiki: Then, Python walked in for verification	2014-08-05 Aldec delivers Rapid Debugging with UVM Toolbox™ to Interpret Complex UVM Verification Environments
2014-08-14 Announcement: Riviera-PRO EDU Available on EDA Playground	2014-09-08 Aldec to Demonstrate Support for Xilinx UltraSCALE and SoC at X-Fest Events in North America	2014-09-23 Aldec Distributor, Prodigy Technovations, to Showcase Aldec Advanced Verification Platforms at DVCon India
2014-09-29 Aldec Serves up Emulation and Static Design Rule Check Solutions at 10th annual ARM TechCon Conference	2014-10-02 Aldec and FTD Solutions Ink Distribution Agreement for Southeast Asia	2014-10-07 Putting the ‘A’ in EDA
2014-11-12 Aldec Delivers Efficient Verification with Requirements-based, User-defined Test Plan in Coverage	2014-12-08 Aldec Releases Active-HDL 10.1 with 64-bit simulation support	2014-12-10 Aldec extends DOORS® Traceability to FPGA/SoC designs with Spec-TRACER™
2015-01-15 Aldec Delivers Unprecedented Scalability and Verification Acceleration with the Latest Release of HES-DVM™	2015-01-19 Aldec Increasing the Return on Simulation	2014-11-29 Verification Plans Overcome Hope-Based Coverage
2014-10-25 3 Reasons to Focus on Hardware Dependent Software	2014-09-26 Dominating FPGA Clock Domains and CDCs	2015-01-29 Aldec launches ALINT-PRO-CDC™ delivering comprehensive CDC Verification Strategies for SoC and FPGA Designs
2015-02-09 Aldec Announces HES-7, the Largest Off-The-Shelf Xilinx Virtex-7 FPGA Prototyping System at up to 288 Million ASIC Gates Capacity	2015-02-18 Aldec to deliver DO-254 Hardware Testing Presentation at Certification Together Intl. Conference (CTIC)	2015-03-10 Aldec Delivers Support for Test Ranking in Code Coverage Analysis
2015-05-04 Xilinx Accelerates System Verification with Vivado Design Suite 2015.1	2015-05-27 Aldec HES-7 with Xilinx Virtex UltraScale Devices Enables True FPGA-based Verification	2015-05-13 Embedded Computing Design: You needn't decide between prototype or emulation Chip Design: CDC Verification: Using Both Static and Dynamic Checking is Key to Success
2014-12-23 Embedded Computing Design: Top five reasons why you need Requirements Traceability	2015-05-26 Aldec @ DAC 2015: Scalable Prototyping, UVM Simulation, Productivity Gains using Python and More	2015-06-01 SemiWiki: Aldec packs 6 UltraScale parts on HES-7 Concept Engineering′s Nlview™ Schematic Visualization Engine to Power Aldec′s ALINT-PRO-CDC™ CDC Verification Solution
2015-05-28 Scale & Scalability -- The Keys to True FPGA-Based Verification	2015-07-02 Semiconductor Engineering: UVM: What’s Stopping You?	2015-07-06 Aldec to offer DAC Technical Sessions Live Online
2015-07-30 Aldec delivers complete Coverage Analysis for FPGA and ASIC Designers with the latest release of Riviera-PRO	2015-08-10 Aldec enhances ALINT-PRO-CDC with Advanced Violation Analysis Capabilities and an Extended Set of Dynamic Checks	2015-08-31 EE Times: Hybrid Emulation: It's about time!
2015-10-20 50+ Successful DO-254 Projects Supported by Aldec’s FPGA Test System; Now with Pre-Tool Qualification Data Package	2015-10-27 Aldec Introduces Hybrid Emulation with ARM® Fast Model Support	2015-10-29 Aldec HES™ Co-emulation named a finalist in this year’s ARM® TechCon Innovation Challenge Say Hi To Hybrid: ARM Fast Models meet Aldec Emulation
2015-11-04 DVCon Europe “must see”: Aldec tutorial and demonstration on adopting Easier UVM to enable FPGA-based Acceleration	2015-11-10 Push the UVM Start Button then Hit the Accelerator	2015-12-15 Push the UVM start button then hit the accelerator, Part 2
2015-12-21 ‘Helpful’ Aldec Design and Verification Blog Articles from 2015	2016-02-02 Aldec Streamlines Management of DO-254 Validation and Verification with Spec-TRACER™ FirstEDA to introduce Aldec’s FPGA Co-emulator at Verification Futures Europe	2016-02-24 Aldec to unveil HES-7 High-speed AXI Transmission Channel at DVCon 2016
2016-03-09 Aldec delivers enhanced UVM Support and New Debugging Features with the latest release of Riviera-PRO	2016-03-15 Aldec Introduces SCE-MI Pipes-based Flow for Streaming High-volume Data and 30% Speed Increase with Latest Release of HES-DVM	2016-03-16 Aldec to Offer Complete Coverage Analysis with the Addition of Condition and Path Coverage to Active-HDL’s Powerful Coverage Database
2016-02-03 Updated tool cuts through DO-254 V&V chaos	2016-02-26 Aldec reprograms HES7 for AXI4 speed	2016-03-11 Design units come to faster Riviera-PRO release
2016-05-17 Aldec Extends Spectrum of Verification Tools for Use in Digital ASIC Designs	2016-05-24 Aldec @ DAC 2016: Scalable Emulation, Prototyping, IoT, ASIC Verification Spectrum and More	2016-07-12 Aldec Increases Verification Productivity with the latest release of Riviera-PRO
2016-08-16 Aldec Delivers Verification Support for Embedded Applications with New TySOM Embedded Development Kit	2016-08-15 Embedded Computing Design: Verification is crucial for programmable SoC designs	2016-08-17 SemiWiki: Optimization and verification wins in IoT designs
2016-09-05 Intelligent Aerospace: FPGA verification techniques for avionics applications	2016-10-11 Aldec to Highlight ASIC Pre-Silicon Verification Spectrum with Network-On-Chip (NoC) Demonstration at DVCon Europe	2016-09-19 SemiWiki: Up front phases improve CDC analysis
2016-10-20 Aldec to Showcase Xilinx Zynq-based ADAS and IoT Gateway Development Platforms at ARM TechCon 2016	2016-11-10 Aldec adds largest Xilinx UltraScale to latest HES Solution for FPGA Simulation Acceleration, Emulation, and Prototyping to be unveiled at SemIsrael 2016	2016-11-14 Aldec and Indian Institute of Science faculty enterprise, ReneLife, showcase ReneGENE for accurate genome alignment on HES Accelerator at SC16 SemiWiki: 3 in 1 Hardware Verification
2016-11-16 Aldec delivers significant SystemVerilog speedup and a pioneering initiative for VHDL users with latest Riviera-PRO	2016-12-07 Top Aldec Design and Verification Blog Articles from 2016	2016-10-27 Semiconductor Engineering: Too Big To Simulate? Semiconductor Engineering: Emulation’s Footprint Grows
2016-10-24 SemiWiki: FPGAs for a few thousand devices more	2017-01-19 Aldec provides Finite State Machine Coverage for verification of safety-critical FPGAs	2017-02-01 Aldec delivers DO-254 Compliant Templates and Checklists with the latest release of Spec-TRACER
2017-02-14 Aldec sets a new paradigm with a single platform for Design Rule Checking and Clock Domain Crossing Verification for FPGA and ASIC designs	2017-02-21 Aldec to Showcase FPGA Acceleration of Genome Alignment, Motion Detection and Face Detection Algorithms at isFPGA 2017	2017-02-23 Aldec to Demonstrate UVM Simulation Acceleration with Network-On-Chip (NoC) Demo Design at DVCon U.S. 2017 Better Code With RTL Linting And CDC Verification
2017-02-28 Aldec unveils Xilinx UltraScale FPGA-based prototyping board enabling Simulation Acceleration and Emulation with the latest release of HES-DVM	2017-03-07 Aldec Introduces End-to-end HW/SW Co-verification for Xilinx Zynq SoC FPGAs at Embedded World 2017	2017-03-15 Aldec Celebrates 10 Years in DO-254 at Certification Together International Conference
2017-04-11 Aldec continues to stack up pre-compiled verification libraries and delivers significant SystemVerilog and UVM speedup with latest release of Riviera-PRO	2017-04-17 Aldec to Demonstrate Design Verification Techniques with Hardware-In-The-Loop and QEMU at DvCON China 2017	2017-05-01 Aldec unveils the newest Xilinx Zynq-based TySOM Embedded Prototyping Board at Embedded Vision Summit 2017
2017-04-18 Q&A with Louie De Luna, Director of Marketing at ALDEC	2017-04-26 A Self-Contained Software-Driven Prototype	2017-03-17
2017-03-17 SemiWiki: Aldec Swings for the Fences	2017-02-16 Aldec Rounds Out ALINT-PRO Checker	2017-04-07 Safety Assured
2017-05-16 Aldec to Showcase new Xilinx UltraScale FPGA Accelerator board for High Frequency Trading Applications at The Trading Show 2017 in Chicago SemiWiki: High Frequency Trading and EDA	2017-04-24 RTL Linting: Proceed with Confidence	2017-05-29 CEO Interview: Stanley Hyduke, founder and CEO of Aldec
2017-06-06 Aldec @ DAC 2017 EE Web: The Benefits of HW/SW Co-Simulation for Zynq-Based Designs	2017-06-15 Aldec and Silvaco present Mixed-Signal Simulation Solution at DAC 2017	2017-05-30 In safe hands: requirement-based testing for design assurance of complex, safety-critical components with high impacts of failure
2017-07-03 HW and SW Co-verification for Xilinx Zynq SoC FPGAs	2017-08-08 Benefit from the power of the latest SystemVerilog subset constructs – with confidence Aldec expands the rule checking capabilities of its ALINT-PRO™ mixed-language verification solution	2017-08-30 Embedded Vision: Look and Identify
2017-09-01 Intelligent Aerospace: Reprogrammable prototyping solutions: a must for space design verification	2017-09-11 Aldec solves ASIC design partitioning challenges with HES-DVM Proto mode	2017-09-12 Aldec @ DVCon India 2017 - accelerating SoC validation by extending QEMU open-source capabilities
2017-09-17 Aldec presents 'HDL Coding Standards and Best Practices for DO-254’ tutorial at the 36th Annual DASC	2017-09-19 SemiWiki: Partitioning for Prototypes	2017-08-02 SemiWiki: Cloud-Based Emulation
2017-10-09 Aldec to Present Software Driven Test of FPGA Prototype @ DVCon Europe 2017	2017-10-10 SemiWiki: An IIot Gateway to the Cloud	2017-10-23 Aldec unveils Zynq™ MPSoC ZU7EV Embedded Board at ARM TechCon 2017
2017-11-09 Aldec to showcase FPGA-based algorithm accelerators at SC17	2017-11-15 Hardware and software engineers designing SoC FPGAs stand to profit from Aldec QEMU Bridge: Aldec supports an integrated co-simulation environment with virtual processor emulator Living on the Edge	2017-12-13 Aldec releases re-configurable FPGA-based accelerators for High Frequency Trading applications
2017-12-21 Aldec and High-Performance Computing	2018-01-17 Assure robustness of Finite State Machines and Reset Domain Crossings – via early static checks Aldec expands advanced verification capabilities of its ALINT-PRO™ design rule checking solution	2018-02-05 Engineering Productivity Improved through Early Code Quality Checks
2018-02-07 Reconfigurable high-performance routers and switches - made easy Aldec launches novel FPGA-based Networking Solution	2018-02-08 Aldec presents ‘Dealing with CDC verification complexity in large-scale FPGA designs’ at FPGA Forum 2018	2018-02-20 QuickLogic Announces Partnership with Aldec for eFPGA Simulation Flow
2018-02-21 Aldec to showcase Verification Spectrum for SoC FPGAs at Embedded World 2018	2018-01-30 SemiWiki: Conflating ISO 26262 and DO-254	2018-04-11 Aldec’s HES UltraScale+ Reconfigurable Accelerator and Northwest Logic’s PCI Express Cores Provide Proven PCI Express Solution
2018-05-02 Aldec and Tamba Networks Release Ultra Low Latency Ethernet Solution for UltraScale+ FPGA at The Trading Show 2018	2018-05-08 Aldec bolsters Riviera-PRO™ with automatic UVM register generation, Unit Linting and the ability to handle early VHDL 2018 extensions	2018-04-18 SemiWiki: RDC - A Cousin To CDC
2018-03-12 SemiWiki: Clock Domain Crossing in FPGA	2018-06-07 Aldec @ DAC 2018: Presenting Innovative SoC Design & Verification Methodologies	2018-07-19 Enhanced early static checks of Finite State Machines and Xilinx IP-based designs Aldec expands advanced verification capabilities of its ALINT-PRO™ design rule checking solution
2018-07-20 Aldec to Present at the 6th China National FPGA Industry Development Forum	2018-06-11 SemiWiki: RAL, Lint and VHDL-2018	2018-08-08 SemiWiki: RAL, Lint and VHDL-2018
2018-10-15 Visible Benefits - Aldec makes available a ‘4k Ultra HD image pass through’ reference design for users of its Xilinx® Zynq® UltraScale+™ MPSoC embedded development kit TySOM-3-ZU7EV A View from Above - Aldec adds a ‘Bird’s Eye View’ function to its growing portfolio of ADAS FPGA-based reference designs for its TySOM-3-ZU7EV embedded development kit - enabling automotive engineers to fast-track their HW/SW development and verification activities	2018-10-22 Aldec’s “Hardware and Software Co-verification in Hybrid Simulation and Emulation Environment with QEMU” DVCon Europe tutorial to demonstrate how engineers can obtain a holistic view over their SoC design	2018-11-13 VHDL 2018 Support & Enhanced Automation - Aldec adds VHDL Standard 1076-2018 extensions and automatic coverage model generation to Riviera-PRO™
2019-01-14 Aldec shortens time of ASIC design prototype bring-up in FPGA with HES-DVM Proto mode	2019-01-22 Aldec facilitates design prototyping in FPGA and prototype testing with new HES Proto-AXI	2019-02-26 Latest TySOM Kit Accelerates the Development of AI, DNN and Other Algorithm Acceleration-dependent Applications Plus Aids SoC Prototyping
2019-04-01 Hardware Lifecycle Data Management for Teams	2019-05-15 Aldec @ DAC 2019: Celebrating its 35th Anniversary and focusing on design acceleration, co-verification and mixed-signal	2019-06-03 Introducing SyntHESer, Aldec’s proprietary high-speed synthesizer for HES emulation and prototyping
2019-06-18 Riviera-PRO™ users to benefit from automatic UVM register generation plus the latest verification methodology libraries	2019-09-09 SoC & ASIC designers to benefit greatly from multiple HES Proto-AXI™ enhancements	2019-09-24 Aldec cuts ASIC design prototype bring-up time with HES-DVM’s automatic partitioning tool and faster HDL-to-FPGA compilation times
2019-10-02 Aldec’s Focus for Arm TechCon is on Deep Neural Network and Machine Learning Application Development	2019-10-21 Aldec at DVCon Europe: Demonstrating a hybrid co-verification platform for ASIC/SoC projects and automated FPGA partitioning software	2019-11-14 Aldec Provides the Industry’s Most-Comprehensive Portfolio of FMC Daughter Cards
2019-11-18 Aldec at SC19: Showcasing Multi-FPGA Partitioning Software for Multi-FPGA-based Algorithm Accelerators	2019-11-26 Aldec’s Latest Embedded Development Platform is First to Feature Largest PolarFire and SmartFusion2 FPGAs on a Single Board Developing Robust Finite State Machines Code With Lint Tools	2019-12-03 Aldec’s Active-HDL Verification Capabilities Enhanced to Support SystemVerilog Constructs and UVM
2019-12-12 Aldec’s new FPGA-based NVMe Data Storage Solution Targets High Performance Computing Applications	2019-12-17 Aldec Enhances Riviera-PRO’s VHDL and UVVM Support	2020-01-28 Cobham Gaisler successfully verifies its first RISC-V processor, NOEL-V, using Aldec’s Riviera-PRO for HDL Simulation
2020-02-19 Aldec and Codasip at Embedded World: Showcasing an Integrated UVM Simulation Environment for Verifying Custom Instructions with RISC-V Cores	2020-03-02 Aldec to Present at Certification Together International Conference	2020-03-24 InterMotion Technology boosts IP verification productivity for Lattice Semiconductor’s CrossLink FPGA family using Aldec’s Active-HDL
2020-04-08 Complete Traceability Between System and Hardware Lifecycle Data	2020-05-04 Aldec’s New HES FPGA Accelerator Board Targets HPC, HFT and Prototyping Applications plus Hits the ‘Price/Performance’ Sweet Spot	2020-06-03 How to Verify Complex RISC-V–based Designs
2020-06-05 How To Implement A Real-time Human Detection Application at the Edge Using Zynq UltraScale+ MPSoC Device	2020-06-10 Webinar Replay – Insight into Creating a Common Testbench	2020-06-24 New to Riviera-PRO™: VHDL-2019 Support and a Versatile UVM Registers Window
2020-06-22 Faster FPGA verification	2020-06-30 Aldec Adds Customizable Tool Qualification Data Package to ALINT-PRO™ for DO-254 Projects	2020-07-15 Aldec @ DAC 2020: Presenting RISC-V Verification Methodologies and Solutions
2020-07-22 Aldec Provides Static Verification for RISC-V Designs with the latest release of ALINT-PRO	2020-08-05 Aldec’s TySOM Embedded Development Kits are Now Qualified for AWS IoT Greengrass	2020-10-21 Aldec’s TySOM Family of Embedded System Development Solutions Now Supports Xilinx PYNQ (Python Productivity for Zynq)
2020-11-03 Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs	2020-11-10 SemiWiki: Aldec Adds Simulation Acceleration for Microchip FPGAs	2020-12-08 Riviera-PRO™: OSVVM 2020.08 inclusion, enhanced language support, and new debugging features aim to boost productivity
2021-01-20 Powerful FPGA Design Creation and Simulation IDE Adds VHDL-2019 Support & OSVVM Enhancements	2021-03-04 Airborne System Design Assurance: Aldec Adds 60+ New HDL Rules to ALINT-PRO’s DO-254 Plug-In	2021-05-18 Riviera-PRO™ Enables VHDL-2019 Users to Unleash the Power of the Language’s New Additions
2021-06-02 Aldec Launches HES-DVM Proto ‘Cloud Edition’ - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping	2021-07-07 New TySOM-M Series Targets Low Power, High Security Applications	2021-07-19 New HES Board is Ideal for Prototyping and Emulating Medium to Large ASIC & SoC Designs
2021-11-16 Productivity Through Methodology: Aldec Adds UVM Generator to Riviera-PRO™ Plus Updates Its OSVVM and UVVM Libraries	2022-01-13 Industry’s First use of TLM for the At-Speed Verification of a PCIe-Based Avionics Design Requiring DO-254 Compliance	2022-03-14 Aldec Suspends all EDA Sales and Distribution Transactions in Russia
2022-03-29 Advancing VHDL’s Verification Capabilities with VHDL-2019 Protected Types	2022-06-01 Riviera-PRO Supports OpenCPI for Heterogeneous Embedded Computing of Mission-Critical Applications	2022-06-22 Verifying at a Higher Level of Abstraction
2023-02-06 Aldec Releases Automated Static Linting and CDC Analysis for Microchip FPGA and SoC FPGA Designs	2023-05-01 Aldec and Thales to Co-Present at Certification Together International Conference 2023	2023-05-18 The avionics industry’s growing need for TLM
2023-06-14 Riviera-PRO Supports System Simulation of AMD® Versal™ ACAP Designs	2023-06-26 Aldec @ DAC 2023: Presenting Design Verification Tools and Solutions for FPGAs and SoCs	2024-02-08 What’s involved in simulation of a complex SoC FPGA like Versal ACAP?